1. Field of the Invention
The present invention refers to circuit boards and methods for producing a circuit board, and in particular to circuit boards comprising a plurality of reference voltage planes.
2. Description of the Prior Art
Printed circuit boards usually comprise a plurality of signal layers and reference voltage layers. Most modern printed circuit boards and especially circuit boards operating with high frequency signals contain one or more supply or reference planes like supply voltage VDD-planes, ground GND-planes or reference voltage Vref-planes. The reference planes are typically copper planes. Most of the signal traces on printed circuit boards are referenced to one of the reference planes. This allows a better controlled impedance of the signal traces and less mutual coupling between neighboring signal traces. A return current of high frequency signals usually propagates on the reference plane in the region directly under the signal trace.
For example in DIMM memory modules (DIMM; DIMM=Dual In Line Memory Module) or in mother boards, there are normally some signal groups which are referenced to a particular reference plane. For example, data bus and clock signal lines are referenced to the GND-plane along the whole path of a memory controller to the memory DRAM chip of the memory module. Contrary thereto, command-address bus lines are referenced to the VDD-plane.
FIG. 4 shows a cross-sectional view of a conventional four-layer circuit board. The circuit board comprises a first, a second and a third dielectric layer 402, 404, 406. A first surface of the dielectric layer 402, in FIG. 4 the top surface, forms a signal layer with a first signal trace 412. A first surface of the second dielectric layer 404, in FIG. 4 the bottom surface, forms a further signal layer comprising a second signal trace 414. The signal traces 412, 414 are strip line or micro-strip lines which are referenced to the supply planes 424, 426. A first supply plane 424 is arranged between the first dielectric layer 402 and the third dielectric layer 406. The second supply plane 426 is arranged between the second dielectric layer 404 and the third dielectric layer 406. Here, the first supply plane 424 forms a GND-plane and the second supply plane 426 forms a VDD-plane. The circuit board comprises a via 442 which connects the first signal trace 412 with the second signal trace 414.
The first signal trace 412 is routed next to and in parallel to the first supply plane 424. Therefore, a return current of a signal propagating on the first signal trace 412 returns on the first supply plane 424. The second signal trace 414 is routed opposite the second supply plane 426. Therefore, a return current of a signal propagating on the second signal trace 414 returns on the second supply plane 426. This is a disadvantage for a signal propagating from the first signal trace 412 through the via 442 to the second signal trace 414 because the first signal trace 412 is referenced to a different supply plane than the second signal trace 414. Here, a signal trace 412, 414 jumps from the signal layer on the top surface of the first dielectric layer 402 through the via 442 to the second signal layer on the bottom surface of the second dielectric layer 404. This results in a change of the reference plane from the ground-plane 424 to the VDD-plane 426. Thus, the current return path for a signal propagating on the combined traces 412, 414 is broken. Such an interruption in the current return path results in signal reflections because of a non-monotonic impedance of the trace and trace-to-trace crosstalk in a region where current return paths of different traces share the same area of the copper plane. Such effect is not so large on traces without vias because the high frequency return current propagates directly behind the trace, but takes place in a region where vias are located. The disadvantage of signal reflections is a bad signal quality which limits the maximum frequency of a signal. Trace-to-trace crosstalk in the via region makes a limitation of via-to-via spacing necessary and restricts the number of vias per trace, which makes a board layout more difficult or even impossible.
The number of signal layers or routing layers is limited. Normally there are just two routing layers per reference plane. Therefore, it is difficult to perform a signal routing which keeps referencing the signal traces to only the required reference plane without changing to another reference plane. In order to keep referencing to the required plane, a large number of layers is necessary which makes the thickness of the printed circuit board unacceptably large.